An insulated-gated field-effect transistor (IGFET), such as a metal-oxide semiconductor field-effect transistor (MOSFET), uses a gate to control an underlying surface channel joining a source and a drain. The channel, source and drain are located within a semiconductor substrate, with the source and drain being doped oppositely to the substrate. The gate is separated from the semiconductor substrate by a thin insulating layer such as a gate oxide. The operation of the IGFET involves application of an input voltage to the gate, which sets up a transverse electric field in the channel in order to modulate the longitudinal conductance of the channel.
The buildup or depletion of charge resulting from the application of a voltage to the gate creates a channel under the gate connecting the source and the drain. The surface of the semiconductor is said to be inverted. The source is biased with a voltage and the drain is grounded relative to the source. In this condition, a current starts to flow as the inverted surface creates an electrically connecting channel. The source and drain are essentially shorted together. Applying more voltage to the gate increases the size of the channel (height-wise), allowing more current to flow through the transistor. By controlling the gate voltage, an IGFET transistor can be used as a switch (on/off) or an amplifier.
Typically, a lightly doped drain (LDD) extension is created within the substrate adjacent to each side of the gate. Such lightly doped regions are usually created by first applying an ion implantation to lightly dope the substrate, and then forming a spacer, such as a nitride spacer, to each side of the gate to act as a mask for a second ion implantation to create heavily doped regions (i.e., the source and drain regions). The channel length of such a transistor, therefore, is the width of the gate itself, since the area of substrate underneath the gate between the lightly doped regions is the same length as the gate width.
For high-performance IGFET applications, such as microprocessors, short channel length is desirable; the shorter the channel length, the less distance the carriers have to traverse in order to move from the source to the drain. LDD extensions are in fact used because in IGFETs having channel lengths less than two micron, the heavily doped regions of the source and the drain may otherwise bridge without the presence of the extensions. Furthermore, because of constraints in the minimum width to which a gate may be formed (as a result of either external requirements such as a certain length necessary for salicidation or metal contact connectability or processing limitations such as the minimum width that photoresist can be selectively sized to create the gate) the length of the channel is usually limited, too. Performance barriers are thus reached as minimum gate size is attained.
This approach is undesirable and becomes especially disadvantageous and problematic in applications where speed is of the utmost importance, such as in microprocessors. There is a need, therefore, to fabricate transistors having short channels than may otherwise be possible where channel length is equal to gate width.